X. Wang, Y. Peng, Y. Zhang, T. Xia, Y. Wu, J. Wang, L. Wang, L. Song, L. Zhao, S. Zhuo, Q. Pan, X. Chen, P. Y. Chiang, and R. Bai, "PAM-X™: A 25Gb/s-PAM4 Optical Transceiver Chipset for 5G Optical Front-Haul," in Optical Fiber Communication Conference (OFC) 2020, OSA Technical Digest (Optical Society of America, 2020).
 Qiwen Liao , Nan Qi , Miaofeng Li, Shang Hu , Jian He, Bozhi Yin, Jingbo Shi , Jian Liu , Patrick Yin Chiang, Xi Xiao , and Nanjian Wu, “A 50-Gb/s PAM4 Si-Photonic Transmitter With Digital-Assisted Distributed Driver and Integrated CDR in 40-nm CMOS”, IEEE Journal of Solid-State Circuits. 2019.
 Juncheng Wang , Quan Pan, Yajie Qin , Xuefeng Chen, Shang Hu, Rui Bai, Xin Wang, Yaxin Cai, Tao Xia, Yuanxi Zhang, Jianxu Ma, Nan Qi , Patrick Yin Chiang, “A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS”, IEEE Transactions on Circuits and Systems-II:Express Briefs. October 2019.
 Shang Hu , Rui Bai, Xin Wang, Yi Peng, Juncheng Wang , Tao Xia, Jianxu Ma, Lei Wang, Yuanxi Zhang, Xuefeng Chen, Nan Qi and Patrick Yin Chiang, “A 4 × 25 Gb/s Optical Transmitter Using Low-Cost 10 Gb/s VCSELs in 40-nm CMOS”, IEEE Photonic Technology Letters, June 15, 2019.
 S.Hu, JC Wang, Q. Nan, P. Chang et al., “A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die,” in IEEE Proc. Opt. Fiber Commun. Conf. (OFC), 2019.
 Qiwen Liao, Shang Hu, Jian He et al., “A Dual-28Gb/s Digital-Assisted Distributed Driver with CDR for Optical-DAC PAM4 Modulation in 40nm CMOS” in IEEE Proc. Radio Frequency Integrated Circuits Symposium (RFIC), 2019.
 S. Hu, R. Bai, J. Wang, X. Chen, J. Ma, X. Wang, Y. Zhang, L. Wang, Y. Cai, H. Yan, J. Xuan, Y. Li, M. Lu, T. Xia, L. Chang, Q. Nan, and P. Chiang, " A 25Gb/s Optical CDR+Driver Transmitter Using 14Gb/s VCSELs in 40nm-CMOS," in ICTA, 2018. (Best Paper Award).
 L. Chang, et. al., "A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation", IEEE Optical Fiber Conference (OFC), 2018.
 J. Shi, et. al., "Design Techniques for Signal Reflection Suppression in High-Speed 25Gb/s Laser Drivers in CMOS", IEEE Photonic Technology Letters, 2018.
 J. Wang, et al., “A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS,” in Proc. of IEEE Asian Solid-State Circuits Conf. (ASSCC), 2017.
 Q. Nan, et. al., "A 51Gb/s, 320mW, PAM4 CDR with Baud-Rate Sampling for High-Speed Optical Interconnects", IEEE Asian Solid-State Circuits Conference, 2017.
 N. Qi, et. al.,"Co-Design and Demonstration of a 25Gb/s Silicon-Photonic Mach-Zehnder Modulator with a CMOS-Based High-Swing Driver", IEEE Journal of Selected Topics in Quantum Electronics, 2016.
 K. Yu, et. al., "A 25Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver with Microring Wavelength Stabilization", IEEE Journal of Solid-State Circuits, 2016.
 G. Hui, et. al., "A 25Gb/s 30dB Limiting Amplifier Using Stacked Inductors", IEEE Optical Interconnects Conference, 2016.
 Q. Yang, et. al., "A 4 x 10-25Gbps Low Noise TIA Design in 65nm CMOS for Optical Serial Link", IEEE Optical Interconnects Conference, 2016.
 J. Shi, et. al., "A Low-Cost, System-on-Chip for Optical Time Domain Reflectometry (OTDR)", IEEE International Wireless Symposium (IWS), 2016.
 N. Qi, et. al., "A 32Gb/s NRZ, 25GBaud/s PAM4 Reconfigurable, Si-Photonic MZM Transmitter in CMOS", Optical Fiber Conference (OFC), 2016.
 L. Hao, et. al., "A 25Gb/s, 4.4V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65nm CMOS", IEEE Journal of Solid-State Circuits, 2016.
 L. Shuo, et. al., "A 0.45V 687pW Low Noise Amplifier Front-End with 1.73 NEF for Energy-Scavenging IoT Sensors", IEEE International Wireless Symposium (IWS), 2016.
 V. Behravan, S. Li, N. Glover, C.H. Chen, M. Shoaib, G. Temes, P.Y. Chiang, "A Compressed-Sensing Sensor-on-Chip Incorporating Statistics Collection to Improve Reconstruction Performance", CICC, 2015.
 J. Wang, N. Qi, Z. Wang, Q. Yang, H. Guo, R. Bai, Z. Hong, P. Y. Chiang, "4 x 30 Gbps 155mW/Channel VCSEL Driver in 65nm CMOS", Optical Interconnects Conference, April-2015.
 Z. Wang, R. Bai, H. Li, J. Wang, N. Qi, Z. Hong, P. Chiang, "A 30mW/Channel 4x25Gbps Baud-Rate Bang-Bang CDR Using an Integrating Receiver Based Data Sampling", Optical Interconnects Conference, April-2015.
 Q. Nan, X. Li, H. Li, X. Xiao, L. Wang, Z. Li, Y. Yu, P. Chiang, "A 25Gb/s, 520mW, Silicon-Photonic Mach-Zehnder Modulator with Distributed Driver in CMOS", Optical Fiber Conference (OFC), 2015.
 Q. Pan, et. al. "A 30-Gb/s 1.37-pJ/bit CMOS Receiver for Optical Interconnects", accepted, IEEE Journal of Lightwave Technology, 2015.
 H. Li, Z. Xuan, A. Titrku, K. Yu, B. Wang, N. Qi, A. Shafik, C. Li, M. Fiorentino, M. Hochberg, S. Palermo, P. Y. Chiang, "A 5 x 25Gbs, 4.4V Swing, AC-Coupled, Si-Photonic Microring Transmitter with 2-Tap Asymmetric FFE and Dynamic Thermal Tuning in 65nm CMOS", ISSCC-2015.
 Y. Song, H. Yang, H. Li, P. Y. Chiang, S. Palermo, "An 8-16Gb/s, 0.65-1.05pJ/b, Voltage-Mode Transmitter with Analog Impedance Modulation Equalization and sub-3ns Power-State Transitioning", JSSC, 2015.
 C. Li, R. Bai, A. Shafik, E. Tabasy, B. Wang, G. Tang, C. Ma, C.H. Chen, Z. Peng, M. Fiorentino, R. Beausoleil, P. Chiang, and S. Palermo, "Silicon Photonic Transceiver Circuits with Ring Resonator Bias-Based Wavelength Stabilization in 65-nm CMOS", IEEE Journal of Solid-State Circuits, 2014.
 J. Wang, L. Sun, Z. Wang, Q. Nan, P. Y. Chiang, Z. Hong, "25 Gb/s VCSEL Driver with Pulse Equalization Technique", accepted, IEEE Optical Interconnects Conference, 2014.
 J. Chen, A. Ayman, M. Fiorentino, P. Y. Chiang, S. Palermo, and R. Beausoleil, "A WDM Silicon Photonic Transmitter based on Carrier-Injection Microring Modulators", IEEE Optical Interconnects Conference, 2014.
 H. Li, S. Chen, L. Yang, R. Bai, W. Hu, F.Y. Zhong, S. Palermo, P. Y. Chiang,"A 0.8V, 560fJ/bit, 14Gb/s Injection-Locked Receiver with Input Duty-Cycle Distortion Tolerable Edge-Rotating 5/4X Sub-Rate CDR in 65nm CMOS", VLSI Circuits Symposium, 2014.
 Z. Wang, R. Bai, J. Wang, X. Jing, Q. Nan, L. Sun, C. P. Yue, Z. Hong, and P.Y. Chiang, "A 25Gbps, 2x-Oversampling CDR Using a Zero-Crossing Linearizing Phase Detector", RFIC Symposium, 2014.
 R. Bai, S. Palermo, and P. Y. Chiang, "A 0.25pJ/b 0.7V 16Gb/s 3-Tap Decision-Feedback Equalizer in 65nm CMOS", International Solid-State Circuits Conference, Feb. 2014.
 J. Cheng, Q. Nan, P. Y. Chiang, and A. Natarajan, "A Low-Power, Low-Voltage WBAN-Compatible Sub-Sampling PSK Receiver in 65nm CMOS", IEEE Journal of Solid-State Circuits, 2014.
 J. Cheng, N. Qi, P. Y. Chiang, A. Natarajan, "A 1.3mW 0.6V WBAN-Compatible Sub-Sampling PSK Receiver in 65nm CMOS", International Solid-State Circuits Conference, Feb. 2014.
 Y. Song, R. Bai, N. Yang, K. Hu, P. Chiang, and S. Palermo, "A 0.47-0.66pJ/bit, 4.8-8Gb/s I/O Transceiver in 65nm-CMOS", IEEE Journal of Solid-State Circuits, May 2013.
 C. Li, R. Bai, A. Shafik, E. Tabasy, G. Tang, C. Ma, C-H. Chen, Z. Peng, M. Fiorentino, P. Chiang, S. Palermo, "A Ring-Resonator-Based Silicon Photonics Transceiver with Bias-Based Wavelength Stabilization and Adaptive Power-Sensitivity Receiver", ISSCC, Feb. 2013.
 T. Jiang, K. Hu, W. Liu, F. Zhong, C. Zhong, and P. Chiang, "A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation (SAR) ADC with Improved Feedback Delay in 40nm-CMOS", accepted, IEEE Journal of Solid-State Circuits, 2012.
 K. Hu, R. Bai, T. Jiang, C. Ma, A. Ragab, S. Palermo, and P. Chiang, "0.16-0.25pJ/bit, 8Gb/s Near-Threshold Serial Link Receiver with Super-Harmonic Injection-Locking" IEEE Journal of Solid-State Circuits, August 2012.
 Nan Qi, Yang Xu, Ni Xu, Baoyong Chi, Yang Xu, Xiaobao Yu, Xing Zhang, Patrick Chiang, Woogeun Rhee, Zhihua Wang, "A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65nm CMOS with On-Chip I/Q Calibration", IEEE Transactions on Circuits and Systems-I, 2012.